ISE Xilinx » History » Version 21
Frédéric Blanc, 2017-04-26 08:47
1 | 19 | Frédéric Blanc | h1. ISE Xilinx Project APPSFPGA |
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2 | 20 | Frédéric Blanc | |
3 | 1 | Frédéric Blanc | !appsfpga_hierarchy.png! |
4 | 21 | Frédéric Blanc | The APPSFPGA contains the Applications FPGA Sample Code for the DDC4100. This sample code |
5 | cycles through test patterns and is meant to offer an example of code that meets the DDC4100 |
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6 | specification. It has been written to implement all features of the DDC4100, such as the complement |
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7 | function and all mirror reset types, as explained in later sections. This sample code also addresses |
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8 | additional operational requirements for the DDC4100 interface which should be observed. |
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9 | 19 | Frédéric Blanc | document:"DDC4100 Applications FPGA Sample Code Guide [2510445.pdf]" |
10 | 16 | Frédéric Blanc | |
11 | 17 | Frédéric Blanc | h2. [[ISE Project Navigator]] |
12 | 3 | Frédéric Blanc | |
13 | 17 | Frédéric Blanc | h2. [[ISE iMPACT]] |