Wiki » History » Revision 5
Revision 4 (Frédéric Blanc, 2018-04-20 10:43) → Revision 5/18 (Frédéric Blanc, 2018-04-20 10:44)
h1. Wiki
ADC
!{width: 50%}esp32_adc001.png!
Features
• Two SAR ADCs, with simultaneous sampling and conversion
• Up to five SAR ADC controllers for different purposes (e.g. high performance, low power or PWDET /PKDET).
• Up to 18 analog input pads
• One channel for internal voltage vdd33, two for pa_pkdet (available on selected controllers)
• Low-noise amplifier for small analog signals (available on one controller)
• 12-bit, 11-bit, 10-bit, 9-bit configurable resolution
• DMA support (available on one controller)
• Multiple channel-scanning modes (available on two controllers)
• Operation during deep sleep (available on one controller)
• Controlled by a ULP coprocessor (available on two controllers)