Embedded » History » Version 4
Frédéric Blanc, 2017-06-26 09:52
| 1 | 1 | Frédéric Blanc | h1. Embedded |
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| 2 | |||
| 3 | !embedded_block_diagram.png! |
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| 4 | 3 | Frédéric Blanc | Fig 1.embedded block diagram |
| 5 | 2 | Frédéric Blanc | !algo_embedded.png! |
| 6 | 3 | Frédéric Blanc | Fig 2.algo embedded |
| 7 | 4 | Frédéric Blanc | !block_diagram_ram.png! |
| 8 | Fig 3.block diagram RAM DDR2 |
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| 9 | 1 | Frédéric Blanc | !zynq_bd.png! |
| 10 | 4 | Frédéric Blanc | Fig 4. Xilinx Zynq SoC block diagram |