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Shared RAM CPU FPGA » History » Revision 2

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Frédéric Blanc, 2023-11-13 10:44


Shared RAM CPU FPGA

Create Block

Configure BRAM

Memory Type: True Dual Port RAM

(Disable) Enable Safety Circuit

Run Connection Automation S_AXI

after Automation

Updated by Frédéric Blanc 10 months ago · 2 revisions