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Frédéric Blanc, 2023-11-13 10:55
Shared RAM CPU FPGA¶
Create Block¶
Configure BRAM
Memory Type: True Dual Port RAM
(Disable) Enable Safety Circuit
Run Connection Automation axi_gpio_0/S_AXI
after Automation¶
Run Connection Automation axi_gpio_0/gpio
After Automation
Run Connection Automation axi_gpio_0/gpio
After Automation
Address Editor
Updated by Frédéric Blanc 10 months ago · 4 revisions