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DLPC410 » History » Revision 5

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Frédéric Blanc, 2017-04-27 13:57


DLPC410

BLOCK NAME BUS TYPE DLPC I/O DESCRIPTION
A DDC_DIN_A 16 LVDS I Data A bus Input
DVALID_A LVDS I Bank A Valid Input Signal
DDC_DCLK_A LVDS I Bank A Input Clock
B DDC_DIN_B 16 LVDS I Data B bus Input
DVALID_B LVDS I Bank B Valid Input Signal
DDC_DCLK_B LVDS I Bank B Input Clock
C DDC_DIN_C 16 LVDS I Data C bus Input
DVALID_C LVDS I Bank C Valid Input Signal
DDC_DCLK_C LVDS I Bank C Input Clock
D DDC_DIN_D 16 LVDS I Data D bus Input
DVALID_D LVDS I Bank D Valid Input Signal
DDC_DCLK_D LVDS I Bank D Input Clock
Ctrl_Sig_In COMP_DATA SE I
NS_FLIP SE I Top/Bottom image flip on DMD

DLPC410 DLP Digital Controller [dlps024c.pdf]

Updated by Frédéric Blanc over 7 years ago · 5 revisions